Title:
Understanding & Implementing PCI Express® 6.0 Receiver Test Requirements
Description:
The PCIe® 6.0 specification doubles the bandwidth and power efficiency of the PCIe 5.0 specification, while continuing to meet industry demand for a high-speed, low-latency interconnect. PCIe 6.0 technology is the cost-effective and scalable interconnect solution for data-intensive markets like Data Center, Artificial Intelligence/Machine Learning, HPC, Automotive, IoT, and Military/Aerospace.
Join this session for an overview of PCIe 6.0 and the latest requirements for PCIe 6.0 receiver calibration and testing. The discussion will include Link Equalization (LEQ) testing, as well as PAM4 Bit Error Rate (BER), Symbol Error Rate (SER), and jitter tolerance testing. Forward Error Correction (FEC) and Flow Control Unit (FLIT) mode uncorrectable burst error analysis will also be covered in this presentation.
Type:
Sponsored Session
Pass Type:
2-Day Pass, All Access Pass, Expo Pass