Evaluating 224G SI Performance of Discrete DC Blocking Capacitors on Optical Modules & Systems

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Originally Aired - Thursday, February 2 12:15 PM - 1:00 PM Pacific Time (US & Canada); Tijuana

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Event Location

Location: Ballroom E


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Title: Evaluating 224G SI Performance of Discrete DC Blocking Capacitors on Optical Modules & Systems

Description: Recently, Ethernet/OIF standard groups have created new task forces to develop 224Gbps-PAM4 signaling to standardize electro-optical requirements needed to facilitate the higher datarate demand in datacenter traffic. It is important to emphasize that most of the connections within and across data centers rely on transceiver modules that convert an optical signal into an electrical signal within a very small form factor. Considering the space limitation on PCB modules that connect Opto-electrical transceivers to high-speed I/O connectors on the host card; the discrete/SMT DC blocking capacitors size, location and technology become more relevant for Module to Host electrical performance. Not only are thru-parameters such as loss and reflections important, but also crosstalk among 8 TX and 8 RX lanes to enable 1.6Tb/s era per port. It should be noted that there are various methods for dc blocking in actual implementations. The low-frequency 3dB cutoff frequency is less than 50 kHz with a recommended value of 100nF. The capacitor is used to limit inrush charge and baseline wander. This paper attempts to provide a framework to identify the minimum performance of SMT DC blocking capacitors to avoid being the bottlenecks for the upcoming 224Gbps-PAM4 signaling

Type: Technical Session

Pass Type: 2-Day Pass, All Access Pass

Theme: Data Centers, High-speed Communications


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